1. Field of the Invention
The present invention relates to a semiconductor element, for example a semiconductor element having a through-electrode formed in a through-hole in a semiconductor substrate, and a semiconductor element fabrication method.
2. Related Art of the Invention
First, a conventional semiconductor element and a method to fabricate the semiconductor element will be described with reference to FIG. 13.
FIG. 13 is a schematic cross-sectional view of through-electrodes and a neighboring portion of a conventional semiconductor element taken along a plane including the thickness of a semiconductor substrate 2.
A through-hole 1 is first formed by a dry etching method or the like in the material of the semiconductor substrate 2 on which an etching mask is formed.
Then, an insulating film (not shown) is deposited on the sidewall of the through-hole 1 by a method such as CVD (Chemical Vapor Deposition) and a seed layer (not shown) is formed on the insulating film. The through-hole 1 is then filled with a conductive material by a method such as plating to form a through-electrode that penetrates the semiconductor substrate 2.
A first wiring layer 4 is formed at one end of the through-electrode and the first wiring layer 4 is electrically connected to a circuit element 6 mounted on or formed on the semiconductor substrate 2.
A second wiring layer 5 is formed at the other end of the through-electrode and the second wiring layer 5 is electrically connected to an external circuit 7 through a terminal such as a solder ball 8.
One typical deep etching method using a dry etching method of the material of a silicon semiconductor substrate 2 used for forming through-holes 1 is the Bosch process (see for example Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 07-503815).
The Bosch process repeatedly alternates between an etching step in which an etching gas, which is SF6 (sulfur hexafluoride) gas or a mixture gas of SF6 containing Ar (argon) gas up to several tens of percent, is used to etch the material of a semiconductor substrate 2 to form a hole and a deposition step in which C4F8 (octafluorocyclobutane) gas is used to deposit a fluorocarbon polymer on the sidewall of the hole as a passivation film, thereby achieving anisotropic etching of silicon.
The Bosch process can achieve etching rates of, for example, 20 μm/min or more and can form a through-hole 1 in the direction of the thickness of the semiconductor substrate 2 that has the shape of a trench whose sidewall is perpendicular to the surface of the semiconductor substrate 2.
The Bosch process will be described below in further detail.
In the etching step described above, the etching gas is dissociated to generate plasma by applying an electromagnetic wave in a chamber used in the dry etching method. F (fluorine) ions and F radicals in the plasma are bombarded on regions of the material of the semiconductor substrate 2 where an etching mask is not formed. A substrate bias is applied to the semiconductor substrate 2 in order to accelerate charged F ions in the direction of the thickness of the semiconductor substrate 2.
The bombardment described above sputters Si (silicon) in the semiconductor substrate 2 to continue chemical reaction of Si with F ions and F radicals to etch the material of the semiconductor substrate 2.
However, F radicals which carry no charge diffuse not only in the direction of the thickness of the semiconductor substrate 2 but in all directions and, as a result, etching of the sidewall of the through-hole 1, as well as etching in the direction of the thickness of the semiconductor substrate 2, is carried out.
Therefore, after the hole is etched to some depth in the etching step, a passivation film is formed on the sidewall of the hole in the deposition step described above, thereby suppressing etching of the sidewall of the hole in the next etching step.
The etching step and deposition step are repeated in this way to further etch the semiconductor substrate 2 in the thickness direction while suppressing etching of the sidewall of the through-hole 1. As a result, desired anisotropic etching can be achieved.
However, since the conventional semiconductor element fabrication method described above repeatedly alternates and proceeds between the etching step and the deposition step to etch in the direction of the thickness of the semiconductor substrate 2, periodic recesses are formed in the sidewall of the through-hole 1 with respect to the direction of the thickness of the semiconductor substrate 2.
In particular, a bellows-like concavo-convex structure 3a as shown in FIGS. 14(A) and 14(B), called scallop, is formed on the sidewall of the through-hole 1. The stripes of the concavo-convex structure 3a are laterally formed as shown.
FIG. 14(A) is a schematic perspective view of the through-hole 1 of the conventional semiconductor element and FIG. 14(B) is a schematic cross-sectional view of the through-hole 1 of the conventional semiconductor element taken along a plane including the thickness of the semiconductor substrate 2.
As a result, the uniformity of the thickness and the degree of adhesion to the surface of the sidewall of the insulating film, which is deposited on the sidewall with vapor supplied from above the through-hole 1, to the sidewall by CVD method are degraded because of the concavo-convex structure 3a having the lateral stripes. Accordingly, the uniformity of the thickness of the seed layer formed on the insulating film is also degraded. Consequently, a phenomenon may occur that the reliability of a through-electrode formed by filing the through-hole 1 with a conductive material by plating decreases.
If the seed layer is formed by sputtering, since the seed layer tends to be discontinuous in recesses, the plating thickness cannot be made uniform in the subsequent step of filling the through-hole 1 with a conductive material by plating. At the worst, a phenomenon may occur that voids (bubbles) are generated and the reliability of the through-electrode significantly degrades.
The inventor has found that such phenomena can occur in the conventional semiconductor fabrication method.
The present invention has been made in view of the problem with the conventional technique described above and an object of the present invention is to provide a semiconductor element and a semiconductor element fabrication method, capable of improving the reliability of through-electrodes formed in through-holes of a semiconductor substrate.